Semiconductor devices and other electronic components (e.g., chip carriers) have been connected to circuitized substrates such as printed circuit boards (e.g., for computers) using a variety of methods, including conductive pins, wirebonds, solder balls and/or columns, compressible leads, etc. In some embodiments, the conductive elements (e.g., leads) have been positioned within an interposer housing. In others, an insulative housing including a semiconductor chip therein has been used, with projecting leads or pins soldered to the circuitized substrate or inserted within receiving conductive openings (e.g., plated through holes) in the substrate. One example of the latter is a dual-in-line (dip) package. Several other examples are also known, some of which are described in the documents cited hereinbelow.
For example, U.S. Pat. Nos. 3,971,610 (Buchoff, et al), 4,050,756 (Moore), 5,033,675 (Shino), and 5,261,826 (Leeb, et al) also discuss various types of interconnectors using conductive elastomer contacts, including use of such contacts to provide electrical connection between two components such as a semiconductor device (chip) and printed circuit board. The resistivity of such conductive elastomer elements can be dependent on the force applied to such elements, the amount of filler material as well as type of filler, etc. Such variables can have a significant impact on the functionality of an electronic assembly built with these elements. U.S. Pat. No. 4,548,451 (Benarr, et al), assigned to the assignee of the instant invention, defines an elastomeric core--flexible circuit member type of interconnection wherein the flexible circuit is subjected to a non-zero mean stress with a cyclic stress applied during actuation or mating (e.g., to a semiconductor device and printed circuit board). Such a form of stress may shorten the fatigue life of the circuit lines on the flexible circuit, thereby possibly resulting in a failed connection. U.S. Pat. No. 4,954,878 (Fox, et al) discusses a interposer system in which a single layer interposer forms an electrical connection between a chip and substrate. The ability of such a system to accommodate manufacturing tolerances of the components being connected is limited by the compressibility of the various components in the system. U.S. Pat. No. 5,041,183 (Nakamura, et al) discusses a method of fabricating an interposer using hot melt adhesive. Such application of hot melt adhesive is of course limited to use at a temperature less then the melting point of the adhesive, thus limiting the temperature range in which this device can be utilized. U.S. Pat. No. 5,207,585 (Byrnes et al) also assigned to the instant invention's assignee, defines a flexible circuit member having raised features for being imbedded into solder balls such as might be used on a semiconductor device and/or printed circuit board. The flexible circuit member forms a membrane member with associated in-plane stresses. These stresses limit the amount of possible out-of-plane deflection when a given force is applied to one or more of the contact members.
Other patents that also discuss various types of electronic packaging interconnection structures include U.S. Pat. No. 4,991,290 (MacKay), U.S. Pat. No. 5,069,628 (Crumly), U.S. Pat. No. No. 5,095,628 (McKenney, et al), U.S. Pat. No. 5,147,208 (Bachler), and U.S. Pat. No. 5,248,261 (Conroy-Wass, et al).
Recently, as packaging requirements have increased, it has been found that solder coupling can be effectively used in relatively high density applications. Various packaging structures (e.g., those referred to in the art as "ball grid array" packages) have been successfully developed, particularly by the assignee of the present invention. An example of such a structure is defined in U.S. Pat. No. 5,435,732 (Angulas et al), assigned to the assignee of the instant invention. Such an example is also referred to in the industry as a tape ball grid array, or "TBGA". Other ball grid array packages are presently being used in the industry, including those referred to as ceramic ball grid array ("CBGA") and plastic ball grid array ("PBGA") packages.
As defined herein, the interconnector of the present invention is particularly adapted for providing sound, effective interconnection between electronic components such as high density ball grid array packages and a receiving circuitized substrate such as a printed circuit board. Such a connection is possible with effective tolerance compensation for the components being connected. The structure of the invention is attainable using known materials in the industry (e.g., dielectric and conductive pad/line materials) and thus assures a cost savings for the finished product.
It is of course understood that the invention is not limited to array package-circuit board types of connections but instead can be readily adapted to many other forms of connection, including board-to-board, pad-to-pad, etc.
It is believed that an interconnector possessing the aforedefined advantageous features and others discernible from the teachings herein would constitute an advancement in the art.